Microprocessor Cache RTL Design Engineer
Advanced Micro Devices
- Fort Collins, CO
- Permanent
- Full-time
- Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.
- Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure.
- Collaborate with Design Verification to develop architecture and features that are documented clearly and are verifiable.
- Collaborate with Design For Test teams to develop RTL that is reliable, testable, and manufacturable.
- Work across global teams to solve complex architectural interactions between IP and SOC designs
- Develop ways to improve our CPU design by increasing quality, by simplifying design complexities through innovation, and by improving our technical interactions with other teams
- Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization. Create technical presentations for peers and management.
- Guide and mentor other engineers.
- Prior experience with successful Cache architecture development and execution including Cache Controller and Array RTL implementation
- Prior experience with Clocks, Power Management, and Reset architecture and logic implementation including Clock Distribution, Clock Domain Crossings, and Voltage Domain crossings
- Prior experience collaborating effectively with a diverse team across disciplines
- Prior experience with Digital RTL Design, Verilog HDL, and Scripting
- BS/MS in EE, CS, CSE (or similar)