Design Verification Engineer III (eInfochips Inc)
Arrow Electronics
- San Jose, CA
- Permanent
- Full-time
- At-least 8+ years of experience in System Verilog HVL.
- At-least 8+ year of experience in UVM.
- Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
- Proficient in SVTB/UVM
- Proficient in debug and assertions coding
- SOC Verification experience
- Proficient in AXI protocol
- Verification closure with team
- Make/Perl/Python
- Ensure customer satisfaction.
- Reporting to customer on daily or weekly progress effectively
- Medical, Dental, Vision Insurance
- 401k, With Matching Contributions
- Short-Term/Long-Term Disability Insurance
- Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
- Paid Time Off
- Tuition Reimbursement
- Growth Opportunities
- And more!