
SoC Design and Verification Engineer
- San Jose, CA
- Permanent
- Full-time
- Develop and implement comprehensive verification strategies for complex SoC designs
- Collaborate with design engineers to create and execute detailed test plans
- Build and maintain automated verification environments
- Drive coverage closure and verification sign-off
- Develop UVM/OVM based testbenches and verification IP
- Perform both RTL and post-P&R gate level verification
- Create and maintain verification infrastructure and documentation
- MS in Electrical Engineering, Computer Engineering, or Computer Science with 8+ years experience, or PhD with 3+ years experience
- Expert-level knowledge of UVM/OVM and assertion-based verification methodologies
- Strong proficiency in Verilog, SystemVerilog, and hardware/software co-verification
- Advanced scripting skills in Python/Perl/TCL/Shell
- Extensive experience with C/C++, SystemC, and assembly coding
- Deep understanding of MIPI, AMBA protocols, and RISC-V/ARM architectures
- Experience with AI/ML computing architectures and GPU design
- Mixed-signal verification expertise
- High-speed IO verification experience (PCIe, DDR)
- Competitive compensation ($180,000 - $300,000)
- Opportunity to work on breakthrough AI technology
- Collaborative, innovation-focused environment
- Career growth and technical leadership opportunities