
Analog/RF IC Layout Design Engineer
- Colorado Springs, CO
- $147,650-184,570 per year
- Permanent
- Full-time
ResponsibilitiesKeysight Technologies has been and will continue to be the world’s premier measurement company. Keysight Technologies has an opening for an Analog Layout Engineer in its ASIC/MMIC Design Center in Colorado Springs.This specific position is to support a team of ASIC/MMIC designers by laying out full custom BiCMOS, CMOS, and bipolar (e.g., InP/GaAs) ICs for leading-edge test and measurement products. Through close collaboration with IC designers and experts in IC technologies and IC design tools, you’ll help create breakthrough components for new Keysight products. The position also requires tools and CAD knowledge to develop methodologies and automation to increase productivity and effectiveness.Job Aspects include:
- Creating transistor level layout views from schematics, spanning from cell-level up through top-level and full-chip assembly
- Completing Design Rule Checking (DRC), Layout-vs-Schematic (LVS), Antenna Checks, and maintaining Layout XL compliance
- Placing device primitives using best practices for thermal and device matching, like common centroid, dummy matching, RF symmetry, interdigitation, etc.
- Soliciting IC designers for advice and feedback on critical circuit nodes, matching requirements, current density requirements, and other critical parameters for circuit success
- Knowledge of electro-migration (EMIR) and how to best prevent and correct its effects
- Understanding of metal density requirements and proper ways to address this type of DRC error
- Assisting the design team with IC floorplanning, creating grid cells and other custom layouts
- Coordinating layout activities with other layout engineers and contractors
- Complete chip level sign-off verifications
- BS/MS in Electrical Engineering, or applicable degree and/or relevant experience
- 7+ years of experience with custom Analog IC Layout experience
- 5+ years of experience with Cadence Virtuoso Layout XL tools including cell level design and top-level verification tasks including full-chip DRC, LVS and metal density/slot rules
- Familiarity with analog design in modern sub-micron BiCMOS (130 nm and smaller)
- Knowledge of device matching, common centroid practices, parasitic effects, and other techniques for guaranteeing quality results
- Ability to work on multiple cell designs in parallel in a dynamic environment
- Experience with Version Control systems (e.g., SVN, Cliosoft/SOS)
- Excellent teamwork, collaboration, and communication skills as you will work directly with IC design engineers and other layout designers
- Basic understanding of simple electrical circuits
- Experience with Mentor Calibre DRC / LVS and similar EDA tools
- Layout experience specifically for high-frequency (20+ GHz) bipolar signal path ICs
- Linux fundamental knowledge
- SKILL programming or other scripting experience
- OCEAN experience
- Medical, dental and vision
- Health Savings Account
- Health Care and Dependent Care Flexible Spending Accounts
- Life, Accident, Disability insurance
- Business Travel Accident and Business Travel Health
- 401(k) Plan
- Flexible Time Off, Paid Holidays
- Paid Family Leave
- Discounts, Perks
- Tuition Reimbursement
- Adoption Assistance
- ESPP (Employee Stock Purchase Plan)