
Firmware/Simulation Design Engineer
- Austin, TX
- Permanent
- Full-time
- Implement transaction-level SoC functional models in C++ for firmware validation
- Build reusable modeling infrastructure for CPU, interconnects, peripherals, and system-level components
- Define and evolve simulation environments, modeling frameworks, and APIs
- Collaborate with architecture and hardware teams to ensure functional and timing fidelity
- Lead model verification and validation strategies including unit testing, regression, and RTL correlation
- Partner with firmware/software/hardware teams to support pre-silicon development and platform bring-up
- Develop and debug SoC firmware functions such as power management, security, and data transfer
- Experience with C++ development experience in hardware modeling or simulation
- Proven expertise in SystemC/TLM or equivalent high-level modeling frameworks
- Experience with virtual platform tools (e.g., Synopsys Virtualizer, Cadence VSP, QEMU, gem5)
- Strong understanding of CPU architecture, memory hierarchy, buses, and peripheral IPs
- Skilled in simulation debugging and model integration
- Familiarity with RTL design (Verilog/SystemVerilog) and verification methodologies (UVM)
- Proficient in scripting languages like Python or Perl for automation
- Exposure to firmware/software bring-up on virtual platforms
- Demonstrated leadership in validation and cross-functional collaboration
- Comfortable working in fast-paced, pre-silicon environments