
FPGA Design Engineer (Secret Clearance)
- Carlsbad, CA
- $127,000-200,500 per year
- Permanent
- Full-time
Locations: Marlborough, MA | Tampa, FL | Carlsbad, CA
Clearance Required: U.S. Citizenship and the ability to obtain and maintain a Secret ClearanceA rapidly expanding technology organization is seeking an experienced FPGA Design Engineer to join its team developing next-generation products and services. In this role, you’ll collaborate with high-performing engineering teams in a fast-paced environment and contribute to cutting-edge digital communications solutions.Key ResponsibilitiesDesign module- and system-level FPGA architectures using Verilog and/or VHDLDevelop simulations and synthesize designs to FPGA hardwareCreate and manage timing constraints; analyze timing results and implement required changesCollaborate on design documentation, specifications, and verification protocolsInterface with hardware teams, interpret schematics, and bring up boardsConduct code and design reviews; maintain FPGA code revision controlDebug and integrate FPGA designs in a lab settingDrive technical issues to resolution independently and as part of a teamRequired QualificationsBachelor's degree in Electrical Engineering, Computer Engineering, or related field8+ years of FPGA design experienceStrong foundational knowledge of digital logic and timingProficiency with FPGA EDA tools (e.g., AMD/Xilinx Vivado, Intel Quartus, Synopsys, Siemens/Mentor Graphics)Demonstrated ability to design and implement reusable, scalable modules using Verilog and/or VHDLStrong communication skills and attention to detailAbility to work effectively in both small and large engineering teamsU.S. citizenship is required due to clearance eligibilityPreferred QualificationsMaster’s degree in Electrical or Computer EngineeringFamiliarity with scripting languages such as TCL, Perl, or PythonExperience with high-speed interfaces (SERDES, DDR, LVDS)Hands-on experience with Linux-based development environmentsSystemVerilog/UVM or similar advanced verification methodologiesActive U.S. Security Clearance needed