
Senior Sustaining Hardware Engineer
- Santa Clara, CA
- $130,000-192,000 per year
- Permanent
- Full-time
- Deep dive into various aspects of any existing hardware design - CPU/ASIC, power, SI, clocking, PCIE, optics, fab, components.
- Work closely with sw & customer teams on high pressure escalations from the field, including reading logs, identifying the bug, determining the best fix with minimal interruption to the field, delivering the final solution, determining if any other systems are susceptible, and implementing measures to prevent the issue from occurring again.
- Writing scripts to look for specific information in the logs or to capture information in live debug sessions
- Work closely with the hw design team, but also be able to make firmware, schematic, BOM, fab changes as needed.
- Lab measurements and debug.
- Work closely with component, FA, ODM teams to identify component level or third party RCAs and fixes needed.
- Identify test escapes. Work with the design validation team to examine current test limitations and develop new tests.
- Write and present root cause analysis for executives and customers.
- BSEE or MSEE
- 5+ years of relevant experience in hardware engineering
- Experience debugging Networking Hardware
- Experience with proper design of 20+ layer count boards featuring 50G+ signals
- Experience debugging and validating multi-phase DC/DC's for high current, high transient loads
- Experience with design and debug of high speed interfaces (DDR, PCIe) as well as low speed signals (I2C, SPI)
- Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN's, Bode plots, PCIE analyzers, TDR's, VNA's
- FPGA design using Verilog