
Formal Verification Engineer
- Austin, TX
- $127,200-190,800 per year
- Permanent
- Full-time
DSP Architecture and DesignGeneral Summary:Qualcomm's Hexagon DSP/Neural Processing Unit (NPU) team is seeking a skilled Senior Formal Verification Engineer to ensure the correctness and reliability of our next-generation cores. You will apply formal methods to verify complex RTL designs, working closely with design and verification teams to deliver high-quality silicon.Key Responsibilities:
- Develop and execute formal verification strategies for hardware blocks within the Hexagon NPU architecture
- Use industry-standard formal tools to prove or falsify assertions and analyze counterexamples
- Debug RTL designs based on formal results and contribute to design improvements
- Document verification plans, results, and coverage metrics to support sign-off
- Integrate formal verification into the overall verification flow, complementing simulation-based approaches.
- Master's or Doctorate degree in Computer Engineering, Computer Science, or Electrical Engineering
- 3-5 years of experience in hardware design verification
- 3-5 years strong hands-on experience with SystemVerilog assertion-based verification techniques
- Familiarity with UVM and simulation-based verification flows
- Proven expertise in driving formal verification to sign-off for complex RTL
- Hands-on experience with high-performance processor designs and/or AI accelerator architectures
- Strong capability in decomposing and partitioning intricate designs to enhance formal verification efficiency
- Proficiency in scripting languages such as Python or Tcl for automation and tool integration
OR
Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 1+ year of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field.
- 2+ years of experience with high-performance microprocessor design.