Staff Engineer, Design Verification Engineering

Analog Devices

  • Colorado
  • $118,988-178,481 per year
  • Permanent
  • Full-time
  • 13 days ago
About Analog DevicesAnalog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and .Staff Engineer Position - DVJob Description SummaryAnalog Devices is committed to investing in our people and their growth. One way we can do this is by establishing a cutting-edge Entry Level Hiring program. This program features high impact professional development, opportunities to drive meaningful projects that are directly tied to business goals, and unique executive exposure. Our duty is to develop the next generation of talent in our communities and provide them with a pathway to apply their academic skills in the real-world. At ADI, our early career hires will learn from the brightest minds who are dedicated to their growth, development, and success. From an industry perspective, incoming new career hires are surrounded by employees that represent the best of the best minds in their respective fields.Apply now for the opportunity to grow your career and help innovate ahead of what’s possible!The Data Center & Energy team is seeking a motivated design engineer to provide support to our Cloud Power BU located at ADI’s Austin, TX, USA. As an individual contributor, the candidate will be working closely with a group of about 15 engineers. The project provides unique learning opportunities related to advanced mixed signal design verification techniques.Responsibilities include, but not limited to:
  • Verification of mixed signal designs and sub-systems using leading edge verification methodologies.
  • Contribute and influence the decisions on methodologies to be adopted for the verification.
  • Architect the testbench and develop in UVM or Formal based verification approaches. Integrate the block testbench in chip-level UVM environment and verify integration.
  • Define testplans, tests and verification methodology for block / chip-level verification. Work with the design team in generating test-plans and closure of code and functional coverage.
  • Continuous interaction with analog and digital teams in enabling top-level chip verification.
  • Support post-silicon verification activities of the products working with design, product evaluation, and applications engineering team.
Minimum qualifications
  • Bachelor's or Master’s degree in Electrical or Computer Engineering.
  • 7+ years of hands-on experience in SystemVerilog/UVM.
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
Preferred qualifications
  • Experience in developing test benches using System Verilog and OVM/UVM.
  • Knowledge of test-plan generation, coverage analysis, transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.
  • Experience of pre and post-silicon verification test flow and automated test benches.
  • Familiarity with verification on multiphase DC-DC controllers.
  • Experience with verification of ARM/RISC-V based sub-systems or SoCs.
  • Experience with verification of voltage interfaces like PMBUS, AVS, SVID, SVI3 etc.
  • Experience with revision control systems like Perforce, Git etc.
  • Verilog, C/C++, System C, TCL/Perl/Python/shell-scripting.
  • RTL design/front-end design experience.
  • Experience with analog SV-RNM/EE-net modeling
  • Experience with formal verification methodology.
  • Strong interpersonal, teamwork and communication skills.
  • Self-motivated and enthusiastic.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.EEO is the Law: . Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $118,988 to $178,481.Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Analog Devices